Exploring the DIMM PIM Architecture for Accelerating Time Series Analysis

Time series analysis (TSA) is an important technique for extracting information from domain data. TSA is memory-bound on conventional platforms due to excessive off-chip data movements between processing units and the main memory of the system. Processing in memory (PIM) is a paradigm that alleviates the bottleneck of memory access for data-intensive applications by enabling computation to be performed directly within memory. In this paper, we first perform profiling to characterize TSA on conventional CPUs. Then, we implement TSA on real-world commercial DRAM Dual-Inline Memory Module (DIMM) PIM hardware UPMEM and identify computation as the primary bottleneck on PIM. Finally, we evaluate the impact of enhancing the computational capability of current DIMM PIM hardware on accelerating TSA. Overall, our work provides insights for designing the optimized DIMM PIM architecture for high-performance and efficient time series analysis.

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Publication Details

Journal
IEEE Computer Architecture Letters
Published
2025-01-01
DOI
https://doi.org/10.1109/lca.2025.3562431
Citations
1
Primary Topic
Computational Physics and Python Applications
Type
article
Field-Weighted Citation Impact
2.48
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article

Exploring the DIMM PIM Architecture for Accelerating Time Series Analysis

Shunchen Shi, Zhichun Li, Fan Yang, Xueqi Li et al.
1 citations
IEEE Computer Architecture Letters
Computational Physics and Python Applications
2.48
article

Exploring the DIMM PIM Architecture for Accelerating Time Series Analysis

Shunchen Shi, Zhichun Li, Fan Yang, Xueqi Li, Ninghui Sun
article en
1 citations

Abstract

Time series analysis (TSA) is an important technique for extracting information from domain data. TSA is memory-bound on conventional platforms due to excessive off-chip data movements between processing units and the main memory of the system. Processing in memory (PIM) is a paradigm that alleviates the bottleneck of memory access for data-intensive applications by enabling computation to be performed directly within memory. In this paper, we first perform profiling to characterize TSA on conventional CPUs. Then, we implement TSA on real-world commercial DRAM Dual-Inline Memory Module (DIMM) PIM hardware UPMEM and identify computation as the primary bottleneck on PIM. Finally, we evaluate the impact of enhancing the computational capability of current DIMM PIM hardware on accelerating TSA. Overall, our work provides insights for designing the optimized DIMM PIM architecture for high-performance and efficient time series analysis.

IEEE Computer Architecture LettersVol. 24(1)
Chinese Academy of Sciences (CN), Institute of Computing Technology (CN)
Openalex Percentile: Top 11%
Computational Physics and Python Applications
2.48
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Exploring the DIMM PIM Architecture for Accelerating Time Series Analysis — Shunchen Shi, Zhichun Li, et al. · IEEE Computer Architecture Letters (2025) | TGRS Research Map | TGRS