Analysis of Inner Stress in Multilayer Thermistors During Bending Test

Introduction: The stress that occurred on the NTC (negative temperature coefficient) thermistor chip while the serving process of the chip was investigated in this study. Methods: We built 3D models of NTCs and examined the stresses in the chip inside with varying structures, on varying load conditions; structural bending load, temperature cycling load, separately, and both. In the resistor ceramic body around termination regions which were connected with solders, the stresses had relatively significant values than the other regions and it was considered as a main factor of the failure of the NTC body. Results: When the number of the inner electrodes increased, the maximum principal stress that occurred on the inside of NTC was decreased gradually and when the number of electrodes was equal to 24, it had the lowest value of 524 MPa. Also, the stress changes inside at varying times were investigated when the periodic temperature of the chip body was changed from -60°C to 120°C. In this case, the maximum principal stress had the lowest value as 538 MPa when the number of inner-electrode was also equal to 24. In addition, stress distribution patterns of bending load were compared with temperature cycling load. Conclusion: Through this study, optimized geometry and failure condition of NTC were obtained.