Generation of Simulated Neutrino Signals for the Digitization Subsystem in the DAPHNE Test Bench of the DUNE Experiment

The DUNE experiment studies neutrinos, fundamental particles that interact weakly with matter. This work describes the development of a subsystem for signal digitization on the DAPHNE card test bench, a critical component in the experiment's data acquisition. HDL designs were implemented on an FPGA, and pulses were generated using an ESP32 microcontroller, which were then converted to analog signals through its DAC. The evaluation was performed using the Analog Discovery 2 device. The results confirmed the correct implementation of the HDL designs, based on predefined data and difference equations. The difference equation-based model demonstrated greater dynamic processing capability, albeit with higher resource consumption, whereas the predefined data design proved more resource-efficient. This development enhances the evaluation of the DAPHNE board, increasing its reliability and adaptability within the context of the DUNE experiment.