On-Chip Aging Sensor Core for Silicon Lifecycle Management
In current nanometer technologies, aging effects may appear after relatively short operating times, compared to the expected lifetime of circuits. Therefore, there is an increasing need to keep on analyzing circuit designs once they are in the field. This goal can be achieved by means of on-chip sensors. In this context, this paper presents a tiny on-chip sensor to monitor in-field aging of functional logic circuits. Experimental results based on extensive SPICE simulations demonstrate this approach is able to detect slight increase of circuit response time due to aging much earlier than a functional error is observed at the circuit output. This solution enables mission-mode monitoring of chip operation, which is a critical aspect of silicon lifecycle management framework. 64 aging sensors were integrated in a 6-stage 64-bit engine RISC-V processor and manufactured with the IHP 130 nm SiGe BiCMOS G2 technology. The area, power and delay side-effects resulting from the inclusion of the sensors into the processor were negligible. Moreover, in order to prevent the sensor from self-aging, it was coupled with a power gating circuitry to disconnect it from power-supply during idle times.
Authors
- Aneesh Balakrishnan (ORCID: https://orcid.org/0000-0002-0944-7867)
- Fabian Vargas (ORCID: https://orcid.org/0000-0002-3871-6464)
Institutions
- Leibniz Institute for High Performance Microelectronics (DE)
Publication Details
- Published
- 2025-03-11
- DOI
- https://doi.org/10.1109/lats65346.2025.10963953
- Citations
- 3
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 2.19