Double Column Error Correction in RRAM Matrix Multiplication Using Weighted Checksums

Resistive RAM (RRAM) technology has emerged as a viable candidate for artificial intelligence and machine learning applications due to its matrix multiplication capability through in-memory computation. However, RRAM technology is characterized by a high soft error rate, which compromises the reliability and accuracy of neural networks. In this paper, weighted checksums are used to devise an error correction scheme to correct any number of errors contained within any two columns of an RRAM array. The error correction mechanism operates directly on the output of the RRAM array, allowing detection and correction of multiple errors within these columns. Experimental results show that the proposed method achieves 96% coverage. Due to the high coverage, low power consumption, and low decoding latency, these codes are ideal for the high throughput and accuracy needs during training and inference of AI models.

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Publication Details

Published
2025-03-11
DOI
https://doi.org/10.1109/lats65346.2025.10963967
Primary Topic
Low-power high-performance VLSI design
Type
article
Field-Weighted Citation Impact
0.00

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article

Double Column Error Correction in RRAM Matrix Multiplication Using Weighted Checksums

Abhishek Das, Nur A. Touba, Kenrick Xavier Pinto, Krishnaja Kodali
Low-power high-performance VLSI design
article

Double Column Error Correction in RRAM Matrix Multiplication Using Weighted Checksums

Abhishek Das, Nur A. Touba, Kenrick Xavier Pinto, Krishnaja Kodali
article en

Abstract

Resistive RAM (RRAM) technology has emerged as a viable candidate for artificial intelligence and machine learning applications due to its matrix multiplication capability through in-memory computation. However, RRAM technology is characterized by a high soft error rate, which compromises the reliability and accuracy of neural networks. In this paper, weighted checksums are used to devise an error correction scheme to correct any number of errors contained within any two columns of an RRAM array. The error correction mechanism operates directly on the output of the RRAM array, allowing detection and correction of multiple errors within these columns. Experimental results show that the proposed method achieves 96% coverage. Due to the high coverage, low power consumption, and low decoding latency, these codes are ideal for the high throughput and accuracy needs during training and inference of AI models.

Intel (United Kingdom) (GB), The University of Texas at Austin (US)
National Science Foundation
Openalex Percentile: Top 94%
Low-power high-performance VLSI design
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