Security Key Generation in SRAM based PUF for Cryptographic Applications

This work meticulously focusses on SRAM designing and to verify its functionality as a PUF. It exploits the inherent manufacturing variations present in SRAM cells to generate unique start-up values, then utilizes them to producea cryptographic key. The design process induced mismatches in the inverters to enhance variability in the SRAM cells. Further this work focused on generating start-up values of SRAM based PUF in three methods: ideal state, practical state and by analyzing PUF Static Noise Margin (PSNM). Through these simulations, it is confirmed that the start-up values of the SRAM cells could be effectively utilized to generate a unique cryptographic key. All design and simulation tasks were conducted using Cadence Virtuoso, a sophisticated tool for integrated circuit design and verification at 90nm CMOS technology node.