28 nm FD-SOI 4 K RF LNA Design Using DC Transistor Characterization Measurements

The design of cryogenic silicon circuits has gained much importance in recent years, in particular for applications such as quantum computers that require interface electronics with ultra-low levels of power consumption at temperatures as low as 4 K. The design of these circuits is complicated due to the lack of standard design kits for their simulation at these temperatures. Alternative approaches to avoid costly design and fabrication cycles are possible, in particular the use of Look-Up-Table (LUT)-based techniques that exploit the characterization of components at cryogenic temperature. In this paper, we illustrate this approach for the design of an RF Low Noise Amplifier (LNA) using a 28 nm FD-SOI technology that has been characterized at cryogenic temperatures.