Leveraging ATE to Optimize System-Level-Test for Multicore Automotive SoCs

Ensuring the reliability of complex Automotive System-on-Chips (SoCs) is critical. System-Level Test (SLT) is a vital yet relatively new approach that enhances traditional manufacturing tests by running real-world functional programs using specialized Automatic Test Equipment (ATE) and meticulously monitoring the results. A current industrial key challenge is gauging how well these SLT procedures exercise the SoC's resources. This work introduces a novel technique for multicore SoCs, that leverages execution trace analysis. We construct a comprehensive data flow graph by capturing different CPUs instruction traces during SLT. Dynamic analysis of this graph traces each data point to its destination. Our method accounts for inter-core synchronization, providing a holistic view of data flow. A custom metric quantifies overall data flow integrity. Tests on an STMicroelectronics automotive device demonstrate the method's efficiency and quantify significant gains in accuracy, time, and reduced human resources, promising more reliable automotive SoCs.