Study on FPGA-based implementation of high-speed trapezoidal shaping

Abstract When a nuclear accident occurs, the radiation dose rate is often high, and the count rate of nuclear pulses will be very large and these pulses are easy to pile up. Under this condition, digital trapezoidal shaping is suitable for use in digital multi-channel analyzers. Because of the high-count rate of the nuclear pulses and the relatively complex trapezoidal shaping algorithm, the implementation speed of the shaping algorithm will be crucial. If the algorithm is implemented with an embedded microprocessor, nuclear pulse shaping calculation will be operated slowly generally. High counting rate pulses cannot be processed, and the nuclides are difficult to identify. To solve this problem, an FPGA-based implementation way of high-speed trapezoidal shaping is designed, and the operation principle is analyzed. Using this implementation method, one shaping convolution calculation can be implemented per clock pulse through synchronous processing with dozens of multipliers and adders. Shaping speed can increase greatly, and a higher count rate nuclear pulse can be analyzed. Functional tests demonstrate that FPGA-based high-speed trapezoidal shaping is feasible.