Performance Analysis of Advanced Step Channel FinFET Structures with Asymmetry and Source Pocket Engineering

This work presents a detailed analysis of three advanced FinFET structures: the Symmetrical Source Step Channel Double Gate FinFET (SSSC-FinFET), the Asymmetrical Source Step Channel Double Gate FinFET (ASSC-FinFET), and the Asymmetrical Source Pocket Implanted Step Channel Double Gate FinFET (ASPSC-FinFET). The study evaluates the impact of structural variations on the primary device parameters, such as threshold voltage, subthreshold slope, and on/off current ratio, by detailed analysis of energy band diagrams, electric field distributions, and drain current characteristics. The results show that asymmetry and pocket implantation significantly improve the device performance. Structure 3 (ASPSC-FinFET) shows the lowest threshold voltage of 0.111 V, the highest on-current of 0.23 mA, and an excellent on-to-off current ratio of 112,575, showing improved carrier injection and reduced short-channel effects.

Authors

Institutions

Publication Details

Published
2025-02-13
DOI
https://doi.org/10.1109/ic363308.2025.10956629
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Performance Analysis of Advanced Step Channel FinFET Structures with Asymmetry and Source Pocket Engineering

Anchula Sathish, Palle Rangappa
Advancements in Semiconductor Devices and Circuit Design
article

Performance Analysis of Advanced Step Channel FinFET Structures with Asymmetry and Source Pocket Engineering

Anchula Sathish, Palle Rangappa
article en

Abstract

This work presents a detailed analysis of three advanced FinFET structures: the Symmetrical Source Step Channel Double Gate FinFET (SSSC-FinFET), the Asymmetrical Source Step Channel Double Gate FinFET (ASSC-FinFET), and the Asymmetrical Source Pocket Implanted Step Channel Double Gate FinFET (ASPSC-FinFET). The study evaluates the impact of structural variations on the primary device parameters, such as threshold voltage, subthreshold slope, and on/off current ratio, by detailed analysis of energy band diagrams, electric field distributions, and drain current characteristics. The results show that asymmetry and pocket implantation significantly improve the device performance. Structure 3 (ASPSC-FinFET) shows the lowest threshold voltage of 0.111 V, the highest on-current of 0.23 mA, and an excellent on-to-off current ratio of 112,575, showing improved carrier injection and reduced short-channel effects.

Jawaharlal Nehru Technological University Anantapur (IN)
Openalex Percentile: Top 94%
Advancements in Semiconductor Devices and Circuit Design
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.

Performance Analysis of Advanced Step Channel FinFET Structures with Asymmetry and Source Pocket Engineering — Anchula Sathish, Palle Rangappa · (2025) | TGRS Research Map | TGRS