Comparative Analysis of Charge Plasma Vertical TFET Structures with H f O₂ and SiO₂ Gate Dielectric materials

This study investigates the impact of different gate dielectric structures on the performance of charge plasma vertical tunnel field-effect transistors (TFETs). Three TFET configurations were considered: a single material gate (H fo2), a double material gate (H fO2, SiO2), and a stacked gate (H fO2 stacked on Si<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">O2</inf>). All of the three structures are evaluated using lateral and vertical conduction currents, electron and hole mobilities, and quasi-Fermi levels. The results indicate a major improvement in the devices' performance with the presence of extra dielectric layers in the double and stacked gate structure. The proposed structures allow peak currents, superior carrier mobilities, as well as even more favorable tunneling barriers when compared to the single material gate. The findings suggest that the careful engineering of gate dielectric materials and their stacking can optimize the performance of TFETs, paving the way for their potential applications in future high-performance electronic devices.