A Logic Testing Approach for Hardware Trojan Detection Using Nature Inspired Algorithms
Hardware Trojan (HT) detection using test pattern generation is very difficult because HTs are intended to be activated by infrequent state of logic at internal circuit nodes. The functionality of these types of circuits is stealthily and can cause severe disruptions even if it is set off. Applying appropriate test vectors is necessary to detect their presence. However, the test generation task requires a vast search space to be explored. Considering all these, Nature Inspired Algorithms (NIAs) are a promising option, as they can effectively explore this search space with test vectors. This paper aims to introduce a test pattern generation methodology using Binary Learning Differential Evolution (BLDE) and the Firefly Algorithm (FA), which are very effective in achieving success. Attacking any arbitrary node (payload) of the circuit cannot be done without a specific internal trigger condition. Logic malfunctions, detected by test vectors at feasible payload nodes is selected later based on their compactness. The validity of the proposed approach can be verified by performing several ISCAS '85 benchmark circuits. Our proposed method gives higher Trojan coverage than that of the previously reported logic testing based techniques.
Authors
- Malay Kule (ORCID: https://orcid.org/0000-0002-0180-7610)
- Debarshi Dey
- Hafizur Rahaman (ORCID: https://orcid.org/0000-0001-9012-5437)
- Banalata Bhunia
Institutions
- Indian Institute of Engineering Science and Technology, Shibpur (IN)
Publication Details
- Published
- 2024-12-20
- DOI
- https://doi.org/10.1109/ised63599.2024.10957327
- Primary Topic
- Physical Unclonable Functions (PUFs) and Hardware Security
- Type
- article
- Field-Weighted Citation Impact
- 0.00