Compiler Pass Framework for Implementing Bit Manipulation Instructions in RISC-V

The increasing demand for customized processors that are useful in cryptographic and machine learning applications in the chip industry has spurred the development of various indigenous processors. One such enhancement is the addition of new assembly instructions as instruction set extensions to improve features of the RISC-V processor. The project focuses on developing software to complement a hardware-based Bit manipulation unit, which is essential for artificial intelligence, machine learning and cryptographic applications based on RISC-V B-Extension. While the Bit Manipulation Unit efficiently integrates with the processor at the hardware level, its full potential can only be realized through proper software support. The proposed framework implements software that enables the recognition and execution of specialized assembly instructions for the RISC-V Bit Manipulation Unit, bridging the gap between hardware and software to unlock its capabilities. Although both GCC and LLVM Compilers offer initial support for the assembly instructions in B-Extension, not all instructions are fully supported by both platforms. In this work,non-ratified instructions were implemented using Bitmanip Pass plugin in LLVM and verified that RISC-V backend supports B-Extension instructions and evaluated the performance. The experimental results demonstrate that the successful addition of Bit Manipulation instructions significantly reduces code size with an average percentage decrease of instruction count of 96.02% and increases the execution speed to a value between 10x and 38x.