The HDL Implementation of High Precision Gaussian Random Number Generator for QKD Using FPGA

In quantum cryptography, the Gaussian Random Number(GRN) plays a crucial role. The Box-Muller is exact method for generating Gaussian random numbers but it requires very complex arithmetic operations. The polarization decision method uses less arithmetic operations and less I/O pins. In this paper we have proposed novel floating point architecture to produce Gaussian random numbers(GRN). In this Floating point architecture initially a software approach is followed to obtain for Uniform Random Number(URN) and perform mathematical computation techniques to generate GRN, hence the overall architecture complexity is reduced when compared to fixed polarization decision method. The proposed floating point architecture achieves precision value 0.001 and 30% less in bonded IOBS which results in simplification of routing and enhance the timing performance. The design is implemented and performed using Xilinx on ZC706 FPGA.