Energy Efficient Approximate Ternary Adder for Image Processing Applications

Approximate computing is a technique that aims to significantly improve speed and power consumption in image processing applications, particularly where optimal precision is not required. This work introduces two approximate ternary half adders, which are then utilized to design four approximate ternary full adders(D1,D2,D3 and D4). Further, 8-trit approximate adders are implemented using each of the four proposed approximate ternary full-adder designs. Error and synthesis analysis are carried out to prove the efficiency of proposed designs. Results show that the proposed ternary full adder design D4 achieves power improvement of up to 90% compared to existing designs. Finally, an image sharpening application is used to validate the efficacy of the proposed approximate ternary adders.