Minimum Steady-State Fault Current of Grid-Forming Inverters With Virtual Impedance-Based Current Limiting Caused by Active Power Control
Fault current limiting based on virtual impedance (VI) has been widely utilized in grid-forming (GFM) inverters. The VI magnitude is generally designed to its maximum value under the worst case, which reduces the point of common coupling (PCC) voltage magnitude to limit the steady-state fault current. However, this letter reveals that due to the constraints imposed by the active power control during the steady state, as the PCC voltage magnitude decreases, its phase angle increases, which has been ignored. The opposite effects of VI on the PCC voltage magnitude and phase angle lead to a minimum steady-state fault current that is independent of VI. During severe grid voltage sags, this minimum steady-state fault current can exceed the current limit, making the effective fault current limiting impossible by using VI alone. This finding provides new insights into the steady-state analysis and control optimization of GFM inverters. Experimental results validate the theoretical findings.
Authors
- Tianxiang Yin
- Jianan Yan (ORCID: https://orcid.org/0000-0003-0753-9466)
- Lei Lin (ORCID: https://orcid.org/0000-0001-5703-8075)
- Xiaojie Shi (ORCID: https://orcid.org/0000-0003-2418-9998)
- Tao Liu (ORCID: https://orcid.org/0009-0004-7684-2375)
Institutions
- Future Science Group (United Kingdom) (GB)
- Huazhong University of Science and Technology (CN)
Publication Details
- Journal
- IEEE Transactions on Power Electronics
- Published
- 2025-04-15
- DOI
- https://doi.org/10.1109/tpel.2025.3560837
- Citations
- 2
- Primary Topic
- HVDC Systems and Fault Protection
- Type
- article
- Field-Weighted Citation Impact
- 1.46
Funders
- Natural Science Foundation for Young Scientists of Shanxi Province