Different Asymmetric DC Configuration in Reduced-Switch Multilevel Inverter: A Comparative Topological Analysis

Multilevel inverters are becoming more appealing by eliminating the need for filter circuits. As a result, this type of inverter can reduce total harmonic and improve output waveform quality. However, it causes a large number of switches, so a reduced-switch topology is used for a compact and cost-effective inverter. This paper examines a different DC source and switching circuit arrangement for 15-level reduced-switch multilevel inverters (RSMLI). PSIM software is used to model both circuits. The goal is to observe and comprehend the differences in the number of DC sources, switches, and circuit complexity for the same level inverter and to understand how these parameters affect inverter performance. According to the findings, the formulation of the number of DC voltage counts, its switching circuit, and structure arrangement all have a different effect on RSMLI reliability.