Analytical Capacitance Model for Carbon Nanotube Field-Effect Transistors Including Interface-Trap Effects

The creation of carbon nanotubes has sparked a paradigm shift in the post-silicon era because of their decent electronic and optical properties. However, interface traps pose an obstacle in the realization of high-performance carbon nanotube field-effect transistors (CNTFETs). Herein, we systematically investigate the C-V characteristics of CNTFETs and propose a small-signal equivalent model to decouple the effects arising from interface traps. Moreover, intrinsic parameters associated with interface traps can be feasibly extracted using this approach. An analytical capacitance model is further developed to be incorporated into the well-established CNTFET virtual source model, and excellent agreement has been achieved between our simulation and the measured results of the as-fabricated MOSCAP. The models developed here help to gain insight into the physical properties of high-κ dielectric interface traps subjected to different processes and inform strategies to achieve high-performance CNTFETs.

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Publication Details

Journal
Nanomaterials
Published
2025-04-14
DOI
https://doi.org/10.3390/nano15080604
Citations
1
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.73

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article

Analytical Capacitance Model for Carbon Nanotube Field-Effect Transistors Including Interface-Trap Effects

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1 citations
Nanomaterials
Advancements in Semiconductor Devices and Circuit Design
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article

Analytical Capacitance Model for Carbon Nanotube Field-Effect Transistors Including Interface-Trap Effects

Zhongjian Teng, Bin Zhou, Yiheng Xue, Jianhua Jiang, Xiao Hu, Panpan Zhang, Rui Zhan
article en
1 citations

Abstract

The creation of carbon nanotubes has sparked a paradigm shift in the post-silicon era because of their decent electronic and optical properties. However, interface traps pose an obstacle in the realization of high-performance carbon nanotube field-effect transistors (CNTFETs). Herein, we systematically investigate the C-V characteristics of CNTFETs and propose a small-signal equivalent model to decouple the effects arising from interface traps. Moreover, intrinsic parameters associated with interface traps can be feasibly extracted using this approach. An analytical capacitance model is further developed to be incorporated into the well-established CNTFET virtual source model, and excellent agreement has been achieved between our simulation and the measured results of the as-fabricated MOSCAP. The models developed here help to gain insight into the physical properties of high-κ dielectric interface traps subjected to different processes and inform strategies to achieve high-performance CNTFETs.

NanomaterialsVol. 15(8)
Beijing University of Posts and Telecommunications (CN), Peking University (CN)
Peking University
Openalex Percentile: Top 30%
Advancements in Semiconductor Devices and Circuit Design
0.73
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