RCLSJ model correction and verification by a proposed test method for DFF’s high-frequency performance

Abstract The pursuit of high-speed response and precise reconstruction of phase reversal within Josephson junction constitutes the principal research objectives for the device model in the superconducting single flux quantum (SFQ) circuits. The proposing of the resistive-capacitive-inductive-shunted junction (RCLSJ) model by incorporating a shunted inductance on the classical resistive-capacitive-shunted junction (RCSJ) model, indeed achieves a more accurate description of the Current–Voltage ( I – V ) characteristics of Josephson junctions. However, the effectiveness of the RCLSJ model in dynamic simulations of SFQ circuits has not yet been verified. We proposed a simple and convenient test structure for D flip-flop (DFF) circuits to obtain the variation of its bias margin over a wide frequency sweep range. Post-simulations using the RCLSJ model were performed for DFF circuits. It was found that there are still matching problems between the simulations and tests, especially in the higher frequency region. Based on the junction area structure and layout application under the SIMIT-Nb03 process, a corrected RCLSJ model, designated as the RCLSJv model, was developed. This model mainly reassigns the parasitic inductance of the junction area and introduces correction coefficients by fitting the test data. The validity of the model has been verified through the comprehensive fitting of multiple sets of DFFs’ test data. In comparation with the RCSJ model, the deviation between the test and simulation results was successfully confined within 3%. Notably, in the frequency range above 60 GHz, the matching degree exhibits a remarkable enhancement, with an improvement factor ranging from 2 to 5 times.