Spurious Suppression and Frequency Accuracy Enhancement in Direct Digital Frequency Synthesis: Analysis, Simulation, and Experiment

Direct digital frequency synthesis (DDS) technology has extensive application across various fields, including instrumentation, communication, measurement, and aerospace. However, due to technical limitations in the digitization process, DDS still faces several challenges, such as spurs and frequency inaccuracy. Conventional dithering methods are limited in suppressing spurs, often increase the noise floor, and do not consider the improvement of frequency accuracy. This paper proposes a random frequency compensation (RFC) method to address these issues, which effectively suppresses spurs without raising the noise floor and improves frequency accuracy. The main contributions of this work are threefold. Firstly, we propose an innovative RFC method, which introduces a 1-bit random sequence to disrupt the periodic error sequence and compensate for the fractional part of the frequency control word, thereby simultaneously suppressing spurs and enhancing frequency accuracy. Secondly, we mathematically analyze the spurious suppression and frequency accuracy of the proposed method, supported by simulations to validate theoretical effectiveness of proposed RFC. Finally, to assess real-world performance, we implement the proposed RFC method on a field-programmable gate array (FPGA) and conduct experiments, demonstrating its superiority over conventional dithering methods and its potential for practical use.