Transport characteristics of graphene transistor with dual-gate primarily located in Non-channel region
Abstract Currently, most field effect transistors are configured with the gates locating directly above or below the channel region. Here, we have designed and prepared a novel dual-gate graphene transistor, in which the dual-gate mainly located below the source and drain electrodes and partially overlapped with the channel region. The experimental results show that although the two gates are mainly located in Non-channel region, the transport characteristics of the graphene transistor can be precisely tuned by the dual-gate structure. The Dirac point can be regulated approximately linearly by the gate voltage with the mobility values above 6000 cm 2 / (V·s) at room temperature. This provides new possibility for the design of future graphene field effect transistors.
Authors
- Jing Bai
- Yingxin Wang (ORCID: https://orcid.org/0000-0001-8230-5497)
- Bo Fan (ORCID: https://orcid.org/0009-0005-3762-7063)
- Songang Peng (ORCID: https://orcid.org/0000-0002-3884-2962)
- Yang Cao (ORCID: https://orcid.org/0000-0002-4481-4909)
- Meng Chen
Institutions
- Chinese Academy of Sciences (CN)
- Inner Mongolia Electric Power Survey & Design Institute (China) (CN)
- Institute of Microelectronics (CN)
- Beijing Information Science & Technology University (CN)
- Tsinghua University (CN)
Publication Details
- Journal
- Engineering Research Express
- Published
- 2025-04-09
- DOI
- https://doi.org/10.1088/2631-8695/adcb00
- Primary Topic
- Graphene research and applications
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China