Single Instruction Isolation for RISC-V Vector Test Failures
Testing complex RISC-V extensions such as RISC-V Vector (RVV) with its 600+ highly configurable instructions is crucial. For this reason, test suites have been developed over the last years, including both hand-written and automatically generated tests. Although the process of running these tests is often highly automated, a significant portion of the work, namely the result analysis, has to be conducted manually after the run.
Authors
- Manfred Schlägl (ORCID: https://orcid.org/0009-0007-3275-4797)
- Daniel Große (ORCID: https://orcid.org/0000-0002-1490-6175)
Institutions
- Johannes Kepler University of Linz (AT)
Publication Details
- Published
- 2024-10-27
- DOI
- https://doi.org/10.1145/3676536.3676755
- Citations
- 4
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 1.96