TSO-Flow: A Topology Synthesis and Optimization Workflow for Operational Amplifiers with Invertible Graph Generative Model

Topology is one of the dominant factors governing analog circuit performance but its automatic design remains elusive. Most analog circuit topology designs are largely dependent on human expertise or a limited set of classic structures. To explore the potential of AI-driven design of analog circuit, we propose an automatic generation and optimization workflow, TSO-Flow, for the behavioral-level design of three-stage operational amplifiers. To be specific, TSO-Flow employs an invertible graph generative model to transform discrete circuit topology into a continuous latent representation. By random sampling in the latent space, one can generate an ensemble of latent vectors which can be translated back to novel circuit topology. In contrast to previous methods, such forward and reverse transformations are analytically invertible and thus enable exact likelihood estimation for training. Furthermore, one can optimize the topology in the latent space where a surrogate model is introduced for performance prediction. We evaluate the proposed framework with state-of-the-art methods via experiments on three-stage operational amplifiers. The results demonstrate that TSO-flow provides up to 116% improvements on FoM, 61% reduction in power, 50% less simulations and an overall 5x efficiency enhancement over the baseline methods1.