DeepGate3: Towards Scalable Circuit Representation Learning

Circuit representation learning has shown promising results in advancing the field of Electronic Design Automation (EDA). Existing models, such as DeepGate Family, primarily utilize Graph Neural Networks (GNNs) to encode circuit netlists into gate-level embeddings. However, the scalability of GNN-based models is fundamentally constrained by architectural limitations, impacting their ability to generalize across diverse and complex circuit designs. To address these challenges, we introduce DeepGate3, an enhanced architecture that integrates Transformer modules following the initial GNN processing. This novel architecture not only retains the robust gate-level representation capabilities of its predecessor, DeepGate2, but also enhances them with the ability to model subcircuits through a novel pooling transformer mechanism. DeepGate3 is further refined with multiple innovative supervision tasks, significantly enhancing its learning process and enabling superior representation of both gate-level and subcircuit structures. Our experiments demonstrate marked improvements in scalability and generalizability over traditional GNN-based approaches, establishing a significant step forward in circuit representation learning technology.

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Publication Details

Published
2024-10-27
DOI
https://doi.org/10.1145/3676536.3676791
Citations
10
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
4.89
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article

DeepGate3: Towards Scalable Circuit Representation Learning

Zhiwei Zheng, Jianyuan Zhong, Qiang Xu, Zhengyuan Shi et al.
10 citations
VLSI and Analog Circuit Testing
4.89
article

DeepGate3: Towards Scalable Circuit Representation Learning

Zhiwei Zheng, Jianyuan Zhong, Qiang Xu, Zhengyuan Shi, Sadaf Khan, Min Li
article en
10 citations

Abstract

Circuit representation learning has shown promising results in advancing the field of Electronic Design Automation (EDA). Existing models, such as DeepGate Family, primarily utilize Graph Neural Networks (GNNs) to encode circuit netlists into gate-level embeddings. However, the scalability of GNN-based models is fundamentally constrained by architectural limitations, impacting their ability to generalize across diverse and complex circuit designs. To address these challenges, we introduce DeepGate3, an enhanced architecture that integrates Transformer modules following the initial GNN processing. This novel architecture not only retains the robust gate-level representation capabilities of its predecessor, DeepGate2, but also enhances them with the ability to model subcircuits through a novel pooling transformer mechanism. DeepGate3 is further refined with multiple innovative supervision tasks, significantly enhancing its learning process and enabling superior representation of both gate-level and subcircuit structures. Our experiments demonstrate marked improvements in scalability and generalizability over traditional GNN-based approaches, establishing a significant step forward in circuit representation learning technology.

Chinese University of Hong Kong (HK), Huawei Technologies (China) (CN)
Openalex Percentile: Top 3%
VLSI and Analog Circuit Testing
4.89
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