AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis

Recent advances in machine learning (ML) for automating analog circuit synthesis have been significant, yet challenges remain. A critical gap is the lack of a standardized evaluation framework, compounded by various process design kits (PDKs), simulation tools, and a limited variety of circuit topologies. These factors hinder direct comparisons and the validation of algorithms. To address these shortcomings, we introduced AnalogGym, an open-source testing suite designed to provide fair and comprehensive evaluations. AnalogGym includes 30 circuit topologies in five categories: sensing front ends, voltage references, low dropout regulators, amplifiers, and phase-locked loops. It supports several technology nodes for academic and commercial applications and is compatible with commercial simulators such as Cadence Spectre, Synopsys HSPICE, and the open-source simulator Ngspice. AnalogGym standardizes the assessment of ML algorithms in analog circuit synthesis and promotes reproducibility with its open datasets and detailed benchmark specifications. AnalogGym's user-friendly design allows researchers to easily adapt it for robust, transparent comparisons of state-of-the-art methods, while also exposing them to real-world industrial design challenges, enhancing the practical relevance of their work. Additionally, we have conducted a comprehensive comparison study of various analog sizing methods on AnalogGym, highlighting the capabilities and advantages of different approaches. AnalogGym is available in the GitHub repository1. The documentations are also available at2.

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Publication Details

Published
2024-10-27
DOI
https://doi.org/10.1145/3676536.3697117
Citations
12
Primary Topic
VLSI and FPGA Design Techniques
Type
article
Field-Weighted Citation Impact
2.50

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article

AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis

Yanhan Zeng, Changhao Yan, Zhaori Bi, Fan Yang et al.
12 citations
VLSI and FPGA Design Techniques
2.50
article

AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis

Yanhan Zeng, Changhao Yan, Zhaori Bi, Fan Yang, Weiwei Shan, Xuan Zeng, Wangzhen Li, Keren Zhu, Haochang Zhi, Jintao Li, Yun Li, Ruiyu Lyu
article en
12 citations

Abstract

Recent advances in machine learning (ML) for automating analog circuit synthesis have been significant, yet challenges remain. A critical gap is the lack of a standardized evaluation framework, compounded by various process design kits (PDKs), simulation tools, and a limited variety of circuit topologies. These factors hinder direct comparisons and the validation of algorithms. To address these shortcomings, we introduced AnalogGym, an open-source testing suite designed to provide fair and comprehensive evaluations. AnalogGym includes 30 circuit topologies in five categories: sensing front ends, voltage references, low dropout regulators, amplifiers, and phase-locked loops. It supports several technology nodes for academic and commercial applications and is compatible with commercial simulators such as Cadence Spectre, Synopsys HSPICE, and the open-source simulator Ngspice. AnalogGym standardizes the assessment of ML algorithms in analog circuit synthesis and promotes reproducibility with its open datasets and detailed benchmark specifications. AnalogGym's user-friendly design allows researchers to easily adapt it for robust, transparent comparisons of state-of-the-art methods, while also exposing them to real-world industrial design challenges, enhancing the practical relevance of their work. Additionally, we have conducted a comprehensive comparison study of various analog sizing methods on AnalogGym, highlighting the capabilities and advantages of different approaches. AnalogGym is available in the GitHub repository1. The documentations are also available at2.

University of Electronic Science and Technology of China (CN), Fudan University (CN), Guangzhou University (CN), Southeast University (CN)
National Science Foundation
Openalex Percentile: Top 10%
VLSI and FPGA Design Techniques
2.50
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