Neural Networks Micro Memory Control Strategy for Mechanical Faults Edge Recognition

The edge recognition of mechanical faults using deep learning models requires the deployment and operation of neural networks, which consume a large amount of memory. However, edge devices have limited memory. To address the problem, a neural network micromemory control strategy is proposed. This strategy addresses the memory resource constraints through process quantization and byte indexing while maintaining the model structure and accuracy. First, the neural network parameters with Gaussian and uniform distributions are tested and corrected to achieve process quantization. Then, a parameter memory control is implemented to achieve low-memory deployment and runtime. Subsequently, a bytes indexing is proposed for parameter location reading, enabling low-memory process inversed quantization. Finally, temporary variables is computed through micro memory overlay. This memory control method using process quantization and bytes indexing not only allows for ultra-low memory deployment and operation of neural networks but also improves test accuracy. It achieves over 97% test accuracy and an edge computation speed of over 200 KB/s with a maximum of 3.89 KB of runtime memory.

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Publication Details

Journal
IEEE Transactions on Industrial Informatics
Published
2025-01-01
DOI
https://doi.org/10.1109/tii.2025.3545091
Primary Topic
Fault Detection and Control Systems
Type
article
Field-Weighted Citation Impact
0.00

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article

Neural Networks Micro Memory Control Strategy for Mechanical Faults Edge Recognition

Yuguang Fu, Baoping Tang, Lei Deng, Shengshan Cui et al.
IEEE Transactions on Industrial Informatics
Fault Detection and Control Systems
article

Neural Networks Micro Memory Control Strategy for Mechanical Faults Edge Recognition

Yuguang Fu, Baoping Tang, Lei Deng, Shengshan Cui, Hao Fu
article en

Abstract

The edge recognition of mechanical faults using deep learning models requires the deployment and operation of neural networks, which consume a large amount of memory. However, edge devices have limited memory. To address the problem, a neural network micromemory control strategy is proposed. This strategy addresses the memory resource constraints through process quantization and byte indexing while maintaining the model structure and accuracy. First, the neural network parameters with Gaussian and uniform distributions are tested and corrected to achieve process quantization. Then, a parameter memory control is implemented to achieve low-memory deployment and runtime. Subsequently, a bytes indexing is proposed for parameter location reading, enabling low-memory process inversed quantization. Finally, temporary variables is computed through micro memory overlay. This memory control method using process quantization and bytes indexing not only allows for ultra-low memory deployment and operation of neural networks but also improves test accuracy. It achieves over 97% test accuracy and an edge computation speed of over 200 KB/s with a maximum of 3.89 KB of runtime memory.

IEEE Transactions on Industrial Informatics
Chongqing University (CN), Nanyang Technological University (SG)
Ministry of Education, Libya, National Research Foundation Singapore, National Natural Science Foundation of China, Fundamental Research Funds for the Central Universities
Affordable and clean energy
Openalex Percentile: Top 93%
Fault Detection and Control Systems
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Neural Networks Micro Memory Control Strategy for Mechanical Faults Edge Recognition — Yuguang Fu, Baoping Tang, et al. · IEEE Transactions on Industrial Informatics (2025) | TGRS Research Map | TGRS