Investigation of Physical Limits of Low Temperature Subthreshold Swing in Indium-Tin-Oxide Transistors

This work investigated the physical limits of subthreshold swing (SS) in indium-tin-oxide (ITO) transistors with temperatures down to 20 K. As the temperature decreases, the ITO transistors first exhibit a significant reduction in SS and reach a common saturated value at temperatures below 77 K for gate dielectrics of 10 nm, 5 nm, and 3 nm HfZrLaO dielectrics. The temperature dependence for SS on temperature for different dielectric thicknesses can be attributed to a transition of the dominant carrier conduction mechanism from percolation conduction (PC) to trap-limited conduction (TLC) as the temperature decreases. Benefiting from the thin dielectric thickness, a short channel 40 nm ITO transistor achieves the highest Q(g<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub>/SS) of 9.26 (822 μS/μm / 88.5 mV/dec) at a drain bias voltage of 0.5 V.