n-Type Metal-Oxide-Semiconductor Field-Effect Transistor Based on 100-Period Fully Strained SiGe/Si Nanostructures with Superlattice Epitaxy for Three-Dimensional Dynamic Random-Access Memory

Vertically stacked 3D dynamic random-access memory (DRAM) with horizontal cells has emerged as a promising solution for next-generation high-density memory. In order to meet the next node requirement, the stacked period of a specific SiGe/Si superlattice (SL) needs to exceed more than 64. However, achieving ultrahigh-period SiGe/Si SLs with uniform strain and low defects remains a critical challenge. Here, we demonstrate the epitaxial growth of fully strained 100-period Si/Si0.8Ge0.2 (43/8 nm) SLs with a total thickness of 5 μm. The SLs exhibit exceptional tier-to-tier uniformity (σthickness ∼ 0.33, σGe% ∼ 0.66), excellent crystallinity, sharp SiGe/Si interface (<3.3 nm), smooth surface (roughness <0.1 nm), and low threading dislocation density (<107/cm2). To efficiently evaluate the electrical performance of stacked SLs, we propose an approach using planar n-MOSFETs fabricated on the top Si layer. Remarkably, these devices show consistent electrical properties across 5–100 periods, confirming the uniformity of electrical performance of individual Si layers across the entire stack, even for 100-period SLs. This work provides a scalable pathway toward high-performance 3D DRAM with significantly enhanced storage density.