Microwave Power Performance of Buffer-Free AlGaN/GaN MISHEMT With MOCVD Grown Ex Situ SiN

This work investigates the effect of ex situ MOCVD-grown SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> gate dielectric and PECVD SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> passivation layer on the microwave power performance of buffer-free AlGaN/GaN MISHEMT. We fabricated devices on a series of four samples diced from a 4 inch epi: first two samples had no gate dielectric while the latter two had upto 3 nm of ex situ SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> as the gate dielectric. In each of the categories, one sample had baseline 100 nm SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> passivation deposited under high frequency plasma conditions, while the other sample had 100 nm bilayer SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> passivation. Devices had gate length of 0.22 μm and width of 2 × 50 μm. Samples with no gate dielectric exhibited low 2DEG density ~7 × 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>12</roman></sup> cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-<roman>2</roman></sup> possibly due to significant charge depletion by the gate Fermi pinning owing to a thin barrier (10 nm, Al<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.3</roman></sub>Ga<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.7</roman></sub>N). Moreover, these HEMTs exhibited high current collapse (CC) <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\ge$</tex-math></inline-formula>38% irrespective of the passivation scheme when subjected to 1 μs pulse. The MISHEMTs on the other hand, exhibited high 2DEG density ~10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>13</roman></sup> cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-<roman>2</roman></sup> which also manifested as increased threshold voltage. Gate lag reduced to a mere 4%–6% in MISHEMTs, while under gate–drain double pulsing, the collapse was found to be 27% and 11% for different passivation schemes. Drain current transient (DCT) studies revealed suppression of surface states upon ex situ SiN deposition, and hinted at localized defects. Finally, under 28 V Class B operation at 6 and 10 GHz, output power of 8.1 W/mm power added efficiency (PAE 68%) and 5.2 W/mm (PAE 47%) respectively were measured under pulsed loadpull conditions.

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Journal
IEEE Transactions on Electron Devices
Published
2025-04-07
DOI
https://doi.org/10.1109/ted.2025.3554160
Citations
2
Primary Topic
GaN-based semiconductor devices and materials
Type
article
Field-Weighted Citation Impact
2.52

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article

Microwave Power Performance of Buffer-Free AlGaN/GaN MISHEMT With MOCVD Grown Ex Situ SiN

Digbijoy N. Nath, Aditya Sadhanala, Aniruddhan Gowrisankar, Hareesh Chandrasekar et al.
2 citations
IEEE Transactions on Electron Devices
GaN-based semiconductor devices and materials
2.52
article

Microwave Power Performance of Buffer-Free AlGaN/GaN MISHEMT With MOCVD Grown Ex Situ SiN

Digbijoy N. Nath, Aditya Sadhanala, Aniruddhan Gowrisankar, Hareesh Chandrasekar, Sai Charan Vanjari, Rasika Muralidharan, Rijo Baby, Ashu K. Bansal, Srinivasan Raghavan
article en
2 citations

Abstract

This work investigates the effect of ex situ MOCVD-grown SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> gate dielectric and PECVD SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> passivation layer on the microwave power performance of buffer-free AlGaN/GaN MISHEMT. We fabricated devices on a series of four samples diced from a 4 inch epi: first two samples had no gate dielectric while the latter two had upto 3 nm of ex situ SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> as the gate dielectric. In each of the categories, one sample had baseline 100 nm SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> passivation deposited under high frequency plasma conditions, while the other sample had 100 nm bilayer SiN<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</i> passivation. Devices had gate length of 0.22 μm and width of 2 × 50 μm. Samples with no gate dielectric exhibited low 2DEG density ~7 × 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>12</roman></sup> cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-<roman>2</roman></sup> possibly due to significant charge depletion by the gate Fermi pinning owing to a thin barrier (10 nm, Al<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.3</roman></sub>Ga<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>0.7</roman></sub>N). Moreover, these HEMTs exhibited high current collapse (CC) <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\ge$</tex-math></inline-formula>38% irrespective of the passivation scheme when subjected to 1 μs pulse. The MISHEMTs on the other hand, exhibited high 2DEG density ~10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>13</roman></sup> cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-<roman>2</roman></sup> which also manifested as increased threshold voltage. Gate lag reduced to a mere 4%–6% in MISHEMTs, while under gate–drain double pulsing, the collapse was found to be 27% and 11% for different passivation schemes. Drain current transient (DCT) studies revealed suppression of surface states upon ex situ SiN deposition, and hinted at localized defects. Finally, under 28 V Class B operation at 6 and 10 GHz, output power of 8.1 W/mm power added efficiency (PAE 68%) and 5.2 W/mm (PAE 47%) respectively were measured under pulsed loadpull conditions.

IEEE Transactions on Electron DevicesVol. 72(5)
Indian Institute of Science Bangalore (IN), Cypress Semiconductor Corporation (Japan) (JP)
Ministry of Electronics and Information technology
Affordable and clean energy
Openalex Percentile: Top 12%
GaN-based semiconductor devices and materials
2.52
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