Interface Fermi‐Level Engineering for Selective Hole Extraction Without p‐Type Doping In Cdte Solar Cells to Reach High Open Circuit Voltage (>1 V)

Solar cells with an open‐circuit voltage ( V oc ) over 1 V are demonstrated utilizing an n‐type CdTe/MgCdTe double‐heterostructure (DH) absorber and an n‐type indium tin oxide (ITO) transparent layer to form a hole‐selective contact. The n‐type ITO layer is directly deposited on the MgCdTe top barrier layer for hole extraction. No p‐type doping is used in the device. Charge transfer from the ITO and the n‐type absorber to the interface states between the ITO and the top MgCdTe barrier results in a Fermi level located near the valence band edge of the CdTe layer. The charged interface acts as an effective “p‐region", resulting in a built‐in voltage ( V bi ) up to 1.01 V. A model is proposed to predict the relationship between Mg composition in the barrier layer and the corresponding V bi , which is in agreement with experimental results obtained from capacitance–voltage ( C –V ) measurements. X‐ray photoelectron spectroscopy (XPS) measurements on samples having a MgCdTe top barrier layer with different Mg compositions confirm the correlation between the interface Fermi‐level position and the observed V bi . This approach of utilizing interface states to engineer the Fermi‐level position opens up a new pathway to overcome the fundamental dopability limitations in many semiconductors.