Hybrid Design of Phase Frequency Detector Applied in Phase Locked Loop to Eliminate Dead and Blind Zones

This paper presents a hybrid design and simulation of a Phase Frequency Detector (PFD) which eliminates the effects of the blind and the dead zones for a charge-pump phase-locked loop (CP_PLL). These parameters limit the detection range of the PLL since they occur at zero and 2π phase differences respectively. Two XOR gates have been added to the conventional D-Flip-flop PFD to eliminate both parameters simultaneously. The proposed system has been simulated using Multisim 14.3 and tested using a 10 MHz input frequency. The simulation results show the system is free of dead and blind zones.