Physical Mechanism of Frequency Dependent TDDB Lifetime through Various Devices in DRAM

This paper proposes physical mechanism on AC/DC TDDB of devices with various SiON/HKMG gate dielectrics in DRAM memories. Experimental results show all AC stress was better than DC stress in the direct tunneling (DT) region. However, AC stress with the low frequency of 10 Hz was more severe than DC stress specially in the FN tunneling region regardless of SiON/HKMG. Furthermore, the TDDB using an AC stress of 10 Hz showed that as the voltage decreased (as it approached to the DT region), the results were the same as those obtained from the DC stress evaluation. This indicates that the recovery phenomenon of generated traps is different in a specific frequency range. To prove this, TDDB was tested over 10 Hz to 10 kHz and through band-diagram analysis, it was shown that the trapped carriers caused by stresses under AC conditions have the different recovery behavior, leading to variation of the degradation. Thus, when calculating the lifetime using AC stress, it is necessary to consider the different current conduction mechanisms and carrier recovery effects.