QUANTISENC++: A Fully-Configurable Many-Core Neuromorphic Hardware
Spiking neural networks (SNNs) use discrete spikes to process information, offering a more biologically realistic computation model compared to artificial neural networks (ANNs). We propose QUANTISENC++, a layer-based neuromorphic design to map and execute SNN models with different network topologies. A layer in QUANTISENC++ integrates leaky integrate and fire (LIF) neurons with a dedicated synaptic memory. Layers can operate independently of each other. QUANTISENC++ supports fixed-point arithmetic operations with variable quantization and mixed precision. It uses approximate adders to reduce the area and power overheads and optimize the performance of SNNs. In addition to configuring QUANTISENC++ as mono-lithic hardware, we propose a many-core architecture using a shared interconnect. We introduce a compiler that uses a graph clustering algorithm to analyze a given SNN model and map it to the many-core versions of QUANTISENC++. We evaluate QUANTISENC++ on different datasets, comparing monolithic and many-core configurations with state-of-the-art designs. Our results show a significant improvement in performance, area, and power efficiency, highlighting QUANTISENC++ as an effective solution for SNN hardware implementations.
Authors
- Nagarajan Kandasamy
- M. Lakshmi Varshika
- Anup Das (ORCID: https://orcid.org/0000-0002-8897-7021)
- Sarah Johari
- Arghavan Mohammadhassani (ORCID: https://orcid.org/0009-0007-3782-3392)
- Shadi Matinizadeh
Institutions
- Drexel University (US)
Publication Details
- Published
- 2024-10-27
- DOI
- https://doi.org/10.1109/ieeeconf60004.2024.10942719
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.00