FEOL Reliability Assessment of 2 nm Gate-All-Around Nanosheet Transistors with both Isolated and non-Isolated Substrates

This paper discusses the FEOL reliability of both substrate isolated and non-isolated 2 nm generation Gate-AllAround (GAA) Nanosheet (NS) Transistors. We demonstrate comparable degradation and similar kinetics for TDDB, NBTI, and PBTI reliability when comparing 2 nm and 3 nm devices. We also show no reliability degradation due to isolated substrates, implying FEOL reliability will not be a showstopper for continued scaling. Furthermore, the importance of the highk (HK) and interfacial layer (IL) thicknesses and quality, and the usefulness of the low voltage peak current (LVPC) as a sensitive IL thickness monitor and as a HK/IL quality monitor are also demonstrated.