A RISC-V Hardware Accelerator for AW-SOM Machine Learning

We propose an AW-SOM algorithm hardware accelerator for RISC-V processors. Our work focuses on the PULPino-based Klessydra fT-13 processor. To the best of our knowledge, this is the first work in the literature that deals with this topic. We implemented the system in an AMD-Xilinx ZedBoard development board with a small amount of hardware resources and a limited dynamic power of 1.66W. The data obtained are compatible with future implementations of other accelerators on the same device to improve the system functionality. Compared to the standard software version of the algorithm, our accelerator can accelerate the convergence time x11 and save 87% energy. The results show that our proposed system is suitable for high-speed and low-energy applications such as edge machine learning and integrated IoT systems.