Towards 6G: Configurable High-Throughput Decoder Implementation for SC-LDPC Codes
Spatially-coupled low-density parity-check (SC-LDPC) codes are considered an important candidate for the upcoming 6G standardization, owing to their superior error-correction capability and practical decoding complexity. However, current high-throughput SC-LDPC decoders rely on unrolled architectures tailored to a certain code and thus lack the necessary rate compatibility for wireless communications. In this paper, we present a fully reconfigurable decoder architecture for SC-LDPC codes. This hardware architecture can decode virtually any SC-LDPC code that fits in the allocated memories. Based on simplified routing networks, our SC-LDPC decoder can deliver extensive code length and code rate support and achieve high throughput to satisfy the requirements of 6G.
Authors
- Wenqing Song (ORCID: https://orcid.org/0000-0002-8806-8717)
- Emmanuel Boutillon (ORCID: https://orcid.org/0000-0003-2124-0786)
- Andreas Burg (ORCID: https://orcid.org/0000-0002-7270-5558)
- Alexios Balatsoukas‐Stimming (ORCID: https://orcid.org/0000-0002-6721-4666)
- Yuqing Ren (ORCID: https://orcid.org/0000-0003-2750-2011)
- Yifei Shen (ORCID: https://orcid.org/0000-0003-4745-9145)
Institutions
- Université de Bretagne Occidentale (FR)
- Université de Bretagne Sud (FR)
- Laboratoire des Sciences et Techniques de l’Information de la Communication et de la Connaissance (FR)
- École Polytechnique Fédérale de Lausanne (CH)
- Eindhoven University of Technology (NL)
Publication Details
- Published
- 2024-10-27
- DOI
- https://doi.org/10.1109/ieeeconf60004.2024.10942947
- Citations
- 1
- Primary Topic
- Error Correcting Code Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.35