Femtosecond Resolution Time-to-Digital Converter Exploiting Near-End Crosstalk Voltage

The foundation of most consumer electronics now relies on digital technologies, especially during the paradigm shift towards 6G, which uses operating frequencies beyond the terahertz range. To examine the precise time domain behavior of these high frequency signals, a pulse stretching time-to-digital converter (TDC) method is proposed. This method exploits the near-end crosstalk between FPGA routing tracks, so the TDC resolution is not limited by the FPGA fabrication technology. The principle idea is to superpose a back crosstalk voltage on the rising edge of an input signal to lower the logic HIGH voltage toggling point while maintaining the falling edge intact. In this study, FPGA-based TDC resolution is pushed toward the femtosecond scale and the measurement uncertainties are kept within ±7 LSB by using a temperature weighted moving average filer. During experiments, two layouts were examined, with resolutions of 1.7 ps and 83 fs. Where, 100 continuous runs were captured, followed by a fast Fourier transform (FFT) analysis to identify the noise sources during time-domain measurements on the FPGA.