A 30-mA Compensation-Free Output-Capacitorless Analog LDO With Hybrid Adaptive Biasing
This paper presents an output-capacitorless low-dropout regulator (OCL-LDO), merging with a hybrid push-pull buffer. The hybrid push-pull buffer implements a dynamic and adaptive biasing push-pull gate driving circuit, achieving stability without needing a complex compensation circuit and external load capacitor. Our devised OCL-LDO can operate with a load current range of 0–30 mA, with a quiescent current of 7 μA at zero load current. The proposed OCL-LDO is fabricated in a 0.18-μm CMOS process with an active area of 0.03 mm2. Measurement results show that with a load current stepping from 0–30 mA and an edge time of 100 ns, the output voltage undershoot is 0.14 V, with a corresponding recovery time of 150 ns. The measured load regulation is 0.207 mV/mA at a supply voltage of 1.15 V and a dropout voltage of 0.15 V.
Authors
- Chee-Cheow Lim
- Nai Shyan Lai (ORCID: https://orcid.org/0000-0002-0925-5072)
- Harikrishnan Ramiah (ORCID: https://orcid.org/0000-0003-3505-6525)
- Pui‐In Mak (ORCID: https://orcid.org/0000-0002-3579-8740)
- Sharifah Fatmadiana Wan Muhamad Hatta (ORCID: https://orcid.org/0000-0001-9519-073X)
- Yong Chen (ORCID: https://orcid.org/0000-0002-2794-1324)
- Rui P. Martins (ORCID: https://orcid.org/0000-0003-2821-648X)
- Yee-Chyan Tan
Institutions
- RCSI & UCD Malaysia Campus (MY)
- Asia Pacific University of Technology & Innovation (MY)
- University of Macau (MO)
- University of Malaya (MY)
- City University of Macau (MO)
- Universiti Tunku Abdul Rahman (MY)
- Tsinghua University (CN)
Publication Details
- Journal
- IEEE Transactions on Power Electronics
- Published
- 2025-04-04
- DOI
- https://doi.org/10.1109/tpel.2025.3558005
- Citations
- 3
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 2.02