A High-Performance Memristive Circuit Design for DCGAN in Edge Computing

Edge computing devices based on the von Neumann architecture can’t fulfill the demand for computational resources in Generative Adversarial Networks. This paper proposes a memristive circuit design for a light-weight and efficient Deep Convolutional Generative Adversarial Networks (DCGAN), which can be integrated into edge computing devices for image generation. The DCGAN scheme can perform convolution operations, deconvolution operations, and various activation functions in a fast and low-power way. Moreover, a high-precision segmental approximate linear weight mapping method based on the 2-Memristor crossbar array structure is proposed to improve the precision of memristive neural networks on edge computing devices. Finally, the results show that the DCGAN scheme significantly reduces the power consumption, time consumption, and input ports while keeping the area overhead unchanged. In the Oxford 17 image generation task, the DCGAN scheme achieves faster speed and lower power consumption compared to the traditional structure. The DCGAN scheme based on memristive circuits provides some references for implementing more intelligent applications on edge devices.