Fabrication and characterization of silicon field-effect diodes with forward-bias leakage path suppression in bulk silicon substrates

Abstract Silicon field-effect diodes (FEDs) have attracted considerable attention owing to their wide range of applications. However, the proposed silicon FEDs have been primarily implemented using silicon-on-insulator (SOI) technology because of the forward-bias leakage path in bulk silicon substrates. In this study, we demonstrated a silicon FED with a p + -n-p-n + structure fabricated on a bulk silicon substrate. The silicon FED—which used a conventional complementary metal-oxide–semiconductor (CMOS) process—exhibited excellent electrical characteristics, including a low OFF current of 10 –14 A μm −1 , high ON current of 10 –5 A μm −1 , and high ON/OFF current ratio of ∼10 9 . By employing a dual-well structure in the silicon FED, the anode-to-body junction leakage current was successfully suppressed under a forward bias.