High-Performance Dual-Gate In-Sn-Zn-O Thin-Film Transistors With Optimized Gate Dielectrics

Abstract.In this study, the effect of the top gate insulator (TGI) deposition conditions on the electrical performance of dual-gate (DG) amorphous InSnZnO (ITZO) thin film transistors (TFTs) is experimentally investigated. It is found that compared to high-temperature deposited TGI, the ITZO TFTs with lower-temperature-deposited (100∘ C) Al2O3 TGI exhibited an improved electrical characteristic, including higher on/off ratio, lower subthreshold swing (SS), etc. Due to the low bonding energy, the Sn-O bond is easily broken during the high-temperature TGI deposition and then more oxygen vacancies generate, doping the ITZO channel failed to turn off in the switching operation of transistor. Based on these insights, high-performance DG ITZO TFTs are fabricated with optimized TGI, achieving a low sub-threshold swing of 141 mV/decade, an ultrahigh on/off current ratio over 109, a high mobility (μ) of 60.8 cm2/VEs, a small threshold voltage shift (Vth) of 0.30 V under positive bias stress (5 V, 3600 s) and a small threshold voltage shift of -0.82 V under negative bias stress (-5 V, 3600 s).