Modeling of Multi-Cell HBT Device Based on Device Structure

This paper focuses on the modeling challenges of a multi-cell heterojunction bipolar transistor (HBT) used in radio frequency (RF) power amplifiers and proposes an innovative linear small-signal modeling method. Based on devices with an emitter size of 3 μm × 40 μm × 2-6 (emitter width × emitter length × emitter index-cell number), an equivalent circuit model including peripheral parasitic parameters is constructed by analyzing device layout characteristics in response to additional parasitic effects introduced by the multi-cell structure. A step-by-step parameter extraction method is used, with particular attention paid to the correction of saturated current parameters, temperature coefficients, thermal resistance correction, and the optimization of junction capacitance parameters based on the capacitance ratio relationship. After the extraction of parasitic parameters, the input and output reflection coefficient errors of the model under zero-bias conditions are below 1.66% in the 0.7-25 GHz frequency band. The accuracy of this model is significantly improved compared to the directly parallel single-cell model. The power simulation results match the measured results very well at frequencies of 2.6 GHz and 3.5 GHz. This modeling method significantly improves the model accuracy of multi-cell HBT devices in RF circuit design and provides an effective tool for high-power amplifier optimization.