Double-Sided Copper Filling of Small Diameter, High-Aspect Ratio Through-Glass Vias in High-Density Glass Interposers

Glass substrates offer significant advantages over current organic substrate, particularly in high-density, high-performance chip packaging for data-intensive applications such as artificial intelligence (AI). Glass with ultra-low flatness enhances the depth of focus in lithography, which helps pattern precisely at advanced nodes. Additionally, their superior thermal stability minimizes pattern distortion, and their outstanding mechanical stability supports ultra-large package sizes. These exceptional dimensional stability properties facilitate precise layer-to-layer interconnect alignment, ultimately enabling glass substrates to achieve 10 times higher interconnect density compared to organic substrates. However, fabricating high-density, small-diameter, high-aspect-ratio (AR) through-glass vias (TGVs) remains a significant challenge. The current state-of-the-art technology for vertical TGVs achieves an aspect ratio of 12, with a via diameter of 30 μm. In this work, we present the first demonstration of straight TGVs with 20 μm diameters on 300 μm thick borosilicate glass, achieving a record high aspect ratio of 15. Thanks to the low large-area packaging cost, low thermal expansion coefficient, excellent thermal stability, and low electrical dissipation in high-frequency operation, borosilicate is chosen as the glass substrate in our research. For straight, high AR TGVs, this study explores a double-sided seed layer enhancement (SLE) approach using electroless deposition to reinforce the seed layer, combined with an electroplating strategy to produce void-free, fully filled straight TGVs metal interconnects. The parameter study of the seed layer enhancement process provides valuable insights and guidelines for fabricating high AR TGVs for future high interconnect density 3D integration system.

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Publication Details

Journal
IEEE Transactions on Components Packaging and Manufacturing Technology
Published
2025-04-02
DOI
https://doi.org/10.1109/tcpmt.2025.3557232
Citations
2
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
1.46

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article

Double-Sided Copper Filling of Small Diameter, High-Aspect Ratio Through-Glass Vias in High-Density Glass Interposers

Tiwei Wei, Ye Yang, Kelly E Lahaie
2 citations
IEEE Transactions on Components Packaging and Manufacturing Technology
3D IC and TSV technologies
1.46
article

Double-Sided Copper Filling of Small Diameter, High-Aspect Ratio Through-Glass Vias in High-Density Glass Interposers

Tiwei Wei, Ye Yang, Kelly E Lahaie
article en
2 citations

Abstract

Glass substrates offer significant advantages over current organic substrate, particularly in high-density, high-performance chip packaging for data-intensive applications such as artificial intelligence (AI). Glass with ultra-low flatness enhances the depth of focus in lithography, which helps pattern precisely at advanced nodes. Additionally, their superior thermal stability minimizes pattern distortion, and their outstanding mechanical stability supports ultra-large package sizes. These exceptional dimensional stability properties facilitate precise layer-to-layer interconnect alignment, ultimately enabling glass substrates to achieve 10 times higher interconnect density compared to organic substrates. However, fabricating high-density, small-diameter, high-aspect-ratio (AR) through-glass vias (TGVs) remains a significant challenge. The current state-of-the-art technology for vertical TGVs achieves an aspect ratio of 12, with a via diameter of 30 μm. In this work, we present the first demonstration of straight TGVs with 20 μm diameters on 300 μm thick borosilicate glass, achieving a record high aspect ratio of 15. Thanks to the low large-area packaging cost, low thermal expansion coefficient, excellent thermal stability, and low electrical dissipation in high-frequency operation, borosilicate is chosen as the glass substrate in our research. For straight, high AR TGVs, this study explores a double-sided seed layer enhancement (SLE) approach using electroless deposition to reinforce the seed layer, combined with an electroplating strategy to produce void-free, fully filled straight TGVs metal interconnects. The parameter study of the seed layer enhancement process provides valuable insights and guidelines for fabricating high AR TGVs for future high interconnect density 3D integration system.

IEEE Transactions on Components Packaging and Manufacturing TechnologyVol. 15(7)
Purdue University West Lafayette (US)
National Science Foundation
Sustainable cities and communities
Openalex Percentile: Top 18%
3D IC and TSV technologies
1.46
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