Design and Verification of Wired Channels Beyond 100 Gbps

The increase of the data rate beyond 100 Gbps for wired channels such as the Chip-to-Module interfaces requires a very careful evaluation and optimization of the transmitter and receiver properties and equalization capabilities based on the specific passive channel of interest. The Channel Operating Margin Methodology offered in the IEEE Standard for Ethernet 802.3 is developed for such purpose. It is adopted in this paper to demonstrate how it can be used while paving a rigorous step-by-step procedure for the transmitter characterization and the reliable evaluation of the receiver equalization. A wide range of experiments are carried out to demonstrate the effective applicability of the COM method for optimizing the 100 Gbps 4-level Pulse Amplitude Modulation (PAM4) signaling and for pushing the channel design toward the length (and loss) limits.