Influence of Switching Loss Magnitude on Lifetime During a Switch-Mode Power Cycling Test of SiC MOSFETs

In a bid to adapt power cycling tests as closely as possible to the actual application conditions, tests with both conduction and switching losses are becoming more common. In this article, the influence of switching losses on power cycling lifetime is studied for discrete SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small>s. Four switch-mode power cycling tests with different switching loss magnitudes are performed in both clamped and unclamped inductive switching modes. Classical dc power cycling tests in <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> and body-diode modes are also conducted as reference tests. It is found that switching losses up to 17 mJ have no observable influence on power cycling lifetime, where only package failures are considered. This means that a junction temperature swing of up to 45 K, lasting a few microseconds, does not accelerate bond wire or solder layer degradations. However, when the switch-mode test is used, the drop in junction temperature during the measurement of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS-hot</sub> (for solder layer degradation monitoring) must be taken into account. Drifts in the gate threshold voltage as well as gate and drain leakage currents were found to depend on the test approach.