Design of an Analog Content Addressable Memory with Memristor

Content Addressable Memories (CAMs) are critical enablers for in-memory computing (IMC), which offers significant improvements in energy efficiency and throughput compared to traditional computing methods. Analog CAMs (aCAMs) have recently been proposed to enhance storage density and energy efficiency. In this work, we present a novel aCAM cell that improves power efficiency and reduces area compared to existing aCAM designs. The design leverages the unique properties of memristors and a specialized read-write algorithm for storing analogue data ranges and performing efficient pattern matching. Simulations using TSMC’s 65 nm CMOS process and the VTEAM memristor model demonstrate significant improvements in power efficiency $(9.2 \mu \mathrm{~W})$ and area reduction ($1.4 \mu \mathrm{~m}^{2}$) while maintaining robust performance under process variability conditions. This architecture is well-suited for energy-efficient neuromorphic computing and machine learning applications. Future work will focus on enhancing search speed and integrating the design into broader in-memory computing systems.

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Published
2024-10-26
DOI
https://doi.org/10.1109/iciset62123.2024.10939766
Primary Topic
Advanced Memory and Neural Computing
Type
article
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article

Design of an Analog Content Addressable Memory with Memristor

Yasir Mahmud
Advanced Memory and Neural Computing
article

Design of an Analog Content Addressable Memory with Memristor

Yasir Mahmud
article en

Abstract

Content Addressable Memories (CAMs) are critical enablers for in-memory computing (IMC), which offers significant improvements in energy efficiency and throughput compared to traditional computing methods. Analog CAMs (aCAMs) have recently been proposed to enhance storage density and energy efficiency. In this work, we present a novel aCAM cell that improves power efficiency and reduces area compared to existing aCAM designs. The design leverages the unique properties of memristors and a specialized read-write algorithm for storing analogue data ranges and performing efficient pattern matching. Simulations using TSMC’s 65 nm CMOS process and the VTEAM memristor model demonstrate significant improvements in power efficiency $(9.2 \mu \mathrm{~W})$ and area reduction ($1.4 \mu \mathrm{~m}^{2}$) while maintaining robust performance under process variability conditions. This architecture is well-suited for energy-efficient neuromorphic computing and machine learning applications. Future work will focus on enhancing search speed and integrating the design into broader in-memory computing systems.

Bangladesh University of Engineering and Technology (BD)
Openalex Percentile: Top 73%
Advanced Memory and Neural Computing
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