Enhancing Prognostics of Analog Electronics Through Simulations

Developing failure prediction algorithms for analog electronics at the system level is challenging due to layout-dependent failure characteristics, requiring extensive failure analyses. This study presents an automated failure analysis approach based on SPICE simulations, offering a resource-efficient method capable of accommodating system changes and upgrades. The analysis focuses on identifying failure characteristics and evaluating the detectability of failure modes for analog electronic circuits at the system level. A systematic failure index (S F I) metric is introduced to detect relevant failure effects. Using this metric, increased noise in output voltage signals is identified as the primary failure effect, resulting from capacitance reduction of capacitors connected to the outputs of DCIDC converters and linear voltage regulators. Experimental studies confirmed signal noise as the main failure characteristic, with discrepancies in effect directions and limited to DCIDC converter outputs. The findings highlight the limitations of simulations in replicating real-world scenarios, emphasizing the need to consider external noise sources and operating conditions for accurate failure anal-ysis. To enhance failure detectability in operation and ultimately achieve predictive maintenance, it is recommended to improve data processing routines to increase sensitivity to noise-related failure characteristics and to adjust data acquisition methods for noise detection, such as edge calculation of noise characteristics using high-frequency data samples.