A Noise-Shaping SAR-Based Capacitance-to-Digital Converter for Sensing Applications

In this work, an energy-efficient noise-shaping (NS) successive-approximation (SAR) capacitance-to-digital converter (CDC) is proposed. The interface is based on a direct-comparison technique, in which the sensor capacitance is compared directly to an on-chip binary weighted capacitive digital-to-analog converter (DAC). To implement NS, a 2nd order feed-forward loop filter processes the extracted residue at the end of each conversion cycle. Employing NS to achieve the target resolution leads to a small capacitive DAC and hence a small Si-area compared to the conventional SAR approach that would require a capacitive DAC with the same resolution as the overall CDC resolution. The proposed capacitive NS SAR sensor interface is designed and implemented in 130 nm CMOS technology for a 4 pF dynamic range and achieves an effective number of bits (ENOB) of 12.0 bits with a measurement time of 2.5 ms. The CDC dissipates 1.0 μA from a 0.8 V supply resulting in a figure of merit (FoM) of 488 fJ/conversion-step.