Towards the Improvement of Memory Management in PDES Systems on Multi-core Shared-memory Machines

The increase of parallelism along with data volume has made more efficient ways of managing memory necessary, especially considering shared-memory architectures. The goal is to present some improvements of memory management on shared-memory computing architectures, using Parallel Discrete Event Simulation (PDES) platforms as a case study. The disclosed solutions span from memory hierarchy awareness in terms of cache/NUMA locality, moving on to an incremental state saving mechanism exploiting write-protection, up to a prompt and memory aware mechanism to do output collection, showing results to validate our findings.