<i>PhasePrint:</i> Exposing Cloud FPGA Fingerprints by Inducing Timing Faults at Runtime
Cloud FPGAs, with their scalable and flexible nature, are rapidly gaining traction as go-to hardware acceleration platforms for compute-intensive workloads. However, their increasing adoption introduces unique security challenges. The hardware-level access that FPGAs provide leads to many vulnerabilities, including the leakage of sensitive information through data remanence and the creation of analog-domain covert channels among users. A foundational requirement in these scenarios is the ability to target an individual FPGA; knowing this, cloud vendors prevent FPGA localization by restricting access to low-level information of the underlying hardware. Beyond aiding adversaries, FPGA localization enables defenders to strategically rotate FPGA usage, preventing prolonged exposure that can lead to confidential data leakage due to long-term data remanence.
Authors
- Matthew Hicks (ORCID: https://orcid.org/0000-0002-3639-4342)
- Jubayer Mahmod (ORCID: https://orcid.org/0000-0001-6535-182X)
Institutions
- Virginia Tech (US)
Publication Details
- Published
- 2025-03-27
- DOI
- https://doi.org/10.1145/3676641.3716012
- Primary Topic
- Physical Unclonable Functions (PUFs) and Hardware Security
- Type
- article
- Field-Weighted Citation Impact
- 0.00